Code_ The Hidden Language of Computer Hardware and Software - Charles Petzold [102]
HLT
67
MOV H,A
77
MOV [HL],A
68
MOV L,B
78
MOV A,B
69
MOV L,C
79
MOV A,C
6A
MOV L,D
7A
MOV A,D
6B
MOV L,E
7B
MOV A,E
6C
MOV L,H
7C
MOV A,H
6D
MOV L,L
7D
MOV A,L
6E
MOV L,[HL]
7E
MOV A,[HL]
6F
MOV L,A
7F
MOV A,A
Several of these instructions, such as
MOV A,A
don't do anything useful. But the instruction
MOV [HL],[HL]
doesn't exist. The opcode that would otherwise correspond to that instruction is actually a HLT (Halt) instruction.
A more revealing way to look at all these MOV opcodes is to examine the bit pattern of the opcode. The MOV opcode consists of the 8 bits
01dddsss
in which the letters ddd represent a 3-bit code that refers to a destination, and sss is a 3-bit code that refers to a source. These 3-bit codes are
000 = Register B
001 = Register C
010 = Register D
011 = Register E
100 = Register H
101 = Register L
110 = Contents of memory at address HL
111 = Accumulator
For example, the instruction
MOV L,E
is associated with the opcode
01101011
or 6Bh. You can check the preceding table to verify that.
So probably somewhere inside the 8080, the 3 bits labeled sss are used in a 8-Line-to-1-Line Data Selector, and the 3 bits labeled ddd are used to control a 3-Line-to-8-Line Decoder that determines which register latches a value.
It's also possible to use registers B and C as a 16-bit register pair BC, and registers D and E as a 16-bit register pair DE. If either register pair contains the address of a memory location that you want to use to load or store a byte, you can use the following instructions:
Opcode
Instruction
Opcode
Instruction
02
STAX [BC],A
0A
LDAX A,[BC]
12
STAX [DE],A
1A
LDAX A,[DE]
Another type of Move instruction is called Move Immediate and is assigned the mnemonic MVI. The Move Immediate instruction is composed of 2 bytes. The first is the opcode, and the second is a byte of data. That byte is transferred from memory into one of the registers or to the memory location addressed by the HL register pair:
Opcode
Instruction
06
MVI B,xx
0E
MVI C,xx
16
MVI D,xx
1E
MVI E,xx
26
MVI H,xx
2E
MVI L,xx
36
MVI [HL],xx
3E
MVI A,xx
For example, after the instruction
MVI E,37h
the register E contains the byte 37h. This is considered to be a third method of addressing memory, called immediate addressing.
A collection of 32 opcodes do the four basic arithmetical operations we're familiar with from the processor we developed in Chapter 17. These are addition (ADD), addition with carry (ADC), subtraction (SUB), and subtraction with borrow (SBB). In all cases, the accumulator is one of the two operands and is also the destination for the result:
Opcode
Instruction
Opcode
Instruction
80
ADD A,B
90
SUB A,B
81
ADD A,C
91
SUB A,C
82
ADD A,D
92
SUB A,D
83
ADD A,E
93
SUB A,E
84
ADD A,H
94
SUB A,H
85
ADD A,L
95
SUB A,L
86
ADD A,[HL]
96
SUB A,[HL]
87
ADD A,A
97
SUB A,A
88
ADC A,B
98
SBB A,B
89
ADC A,C
99
SBB A,C
8A
ADC A,D
9A
SBB A,D
8B
ADC A,E
9B
SBB A,E
8C
ADC A,H
9C
SBB A,H
8D
ADC A,L
9D
SBB A,L
8E
ADC A,[HL]
9E
SBB A,[HL]
8F
ADC A,A
9F
SBB A,A
Suppose A contains the byte 35h and register B contains the byte 22h. After executing
SUB A,B
the accumulator contains the byte 13h.
If A contains the byte 35h, and register H contains the byte 10h, and L contains the byte 7Ch, and the memory location 107Ch contains the byte 4Ah, the instruction
ADD A,[HL]
adds the byte in the accumulator (35h) and the byte addressed by the register pair HL (4Ah) and stores the result (7Fh) in the accumulator.
The ADC and SBB instructions allow the 8080 to add and subtract 16-bit, 24-bit, 32-bit, and larger numbers. For example, suppose the register pairs BC and DE both contain 16-bit numbers. You want to add them and put the result in BC. Here's how to do it:
MOV A,C ; Low-order byte
ADD A,E
MOV C,A
MOV A,B ; High-order byte
ADC A,D
MOV B,A
The two addition instructions are ADD for the