Electronics Made Easy - a Complete Introduction to Electronics - Martin Denny [8]
Gate: On both sides of the n-type bar of (fig 9a) heavily doped (p+) regions of acceptor impurities have been formed by alloying or diffusion (creating P-N junction). These impurity regions are called the gate G. Between the gate and source a voltage Vgs is applied in the direction to reverse bias the P-N junction. Conventional current entering the bar at G is designated Ig.
Channel: The region in fig 9a of n-type material between the two gate regions is the channel through which the majority carriers move from source to drain.
When the gate is biased negatively it repels some of the electrons flowing in the material and forces them into a narrower path thereby increasing the resistance of the current channel. In effect an increase in the reverse bias broadens the depletion layer where there are no free carriers and by constricting the conduction channel reduces the longitudinal current.
Simply a FET controls drain-source current by the bias voltage on the gate, whereas the transistor controls the collector current by an increase in base current.
INTEGRATED CIRCUITS
An integrated circuit consists of a single-crystal chip of silicon containing both active and passive elements and their interconnections. These circuits are produced by the same processes used to fabricate individual transistors and diodes.
Integrated circuits are cheap to mass produce and an operational amplifier for example can be purchased for the price of two general purpose transistors.
OPERATIONAL AMPLIFIERS
These devices are generally housed in dual in line packages (DIL) although some military specification devices are housed in a metal can rather like a transistor but with more leads. Figure 10a shows a typical op-amp package. Packages are available in 8 way, 14 way, 16 way, up to 40 way, where several devices may be housed in the same package.
The operational amplifier (op-amp) symbol shown in fig 10b shows an amplifier with a negative inverting input and positive non inverting input with respect to the output. The power supply connections are shown above and below the body of the amplifier. The amplifier is generally supplied with a dual power supply to enable it to operate either side of 0 volts, but in many cases it is cost effective to design a circuit where the amplifier output does not fall below zero volts thus making a size and cost saving in the design. Note not all operational amplifiers will operate with a single supply.
The operational amplifier configurations shown in figures 10c, 10d and 10e enable the amplifier to operate as an inverting, non-inverting or differential amplifier. Without external components the amplifier would have a gain in the order of 10,000 times therefore negative feedback is introduced into the design.
The inverting amplifier shown in figure 10c is driven from a source with an output impedance of Rs. Resistors Ri and Rf are used to provide negative feedback. The values are calculated as follows:
Gain G = Rf/Rin, where Rin = Rs + Ri
1/R = 1/Rin + 1/Rf, therefore R= RinRf/(Rin + Rf)
R is selected to provide the same impedance to the positive input as the negative.
In the case of a variable Rs, ie feed from a potentiometer, the value of Ri should be selected to be many times greater than Rs, so Rs has an insignificant effect on gain.
The non-inverting amplifier shown in Figure 10d is driven from a source with an output impedance of Rs. Resistors R and Rf are used to provide negative feedback. The values are calculated as follows:
Gain G = (Rf + R)/R, and R = Rin = Ri + Rs
The differential amplifier shown in Figure 10e has inputs at both inverting and non - inverting ports. This is useful in cases where a signal 0v cannot be directly connected to the amplifier zero volt line, ie buffer amplifiers, or the difference between two separate points which must be amplified. The amplifier produces