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Electronics Made Easy - a Complete Introduction to Electronics - Martin Denny [13]

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circuit using NAND gates.

When A and B are both 1 and/or C and D are both 1 then Z = 0

If either A and/or B is 0 and C and/or D is 0, then Z = 1

Timing and Counting

When a pulsed signal is fed into a circuit it is sometimes necessary to condition the signal to prevent double pulsing or to provide a suitable leading edge to trigger the circuit. A Schmitt trigger is sometimes used to condition the input signal where the input voltage "switch on" and "switch off" points are controlled, see figure 3.

Apart from variation in trigger level the Schmitt trigger will produce a variation in mark to space ratio.

When an input is fed from a switch or relay it is possible to get a double pulse due to contact bounce, this can be overcome by triggering on the first leading edge and generating a pulse of a suitable width, see figure 4.

At input A = 1, Z1 = 0 and Z2 = 1. The output Z2 is fed back to input B via capacitor C, which holds Z1 at logic 0 until the voltage at B is discharged via resistor R to logic 0. Z1 will then be logic 1 if input A is logic 0, therefore output Z2 is logic 1.

The output pulse width T will be equal to 0.7CR for CMOS and (5-0.8)/5 *CR for TTL.

When a Bistable Multivibrator is fed with a trigger pulse it serves to toggle the output between 0 and 1, thus two pulses generate one pulse in phase with the input.

A T type flip-flop is a bistable multivibrator with an input T and outputs Q and not Q (ie inverted Q), see figure 5.

If several flip-flops are cascaded it is possible to form a counter as each stage gives a divide by 2 function. The J K flip-flop shown below is essentially a T type with two additional inputs J, set and K, reset. The J, K inputs only effect the output when a clock pulse is present at input T, see figure 6.

Note: n represents the number of operations or clock pulses.

The Binary System

As only 0 and 1 are available it is necessary to count in increments of 2 or in binary, see below.

The previous table shows the decimal equivalent of an eight bit binary number. It is possible to generate a maximum count of 11111111 which is equivalent to 255, (1+2+4+8+16+32+64+128).

In order to convert a train of pulses into a binary number it is necessary to pass the input pulses through several stages of a divide by 2 circuit ie flip-flop, which resets after the desired number of pulses. In practice counter logic IC's are available to provide a binary count from a train of pulses, see figure 7.

Figure 7 shows a 12 bit binary counter with outputs Q0 to Q11, of which only Q0 to Q4 are used to produce a 4 bit binary count.

Q0 to Q3 feed transistor switches which drive LED's to provide an optical indication. Note the output equivalent to 20 is Q0 and 23 is Q3. When the count goes above 1111 or 15, Q4 goes high and resets the counter to 0000. If an 8 bit counter were required then outputs Q0 to Q7 would be connected to the drivers and Q8 would be connected to reset.

The binary number generated by a counter can be converted to drive a digital display using a BCD 7 segment decoder, see figure 8.

The Binary counter output Q0 to Q3 is fed to the display driver (4511B) and the reset logic. At the count of 10, or 1010 the AND output goes to logic 1 and resets the counter to 0000. The output of the display driver feeds the display via current limiting resistors.

If a count greater than 9 is required the reset pulse from the counter can be fed into a duplicate circuit as the trigger pulse. The second display would indicate tens not units as in the first display. The reset pulse from the second circuit could be used to generate 100's if necessary (ie cascaded).

Timers

There are several specialised timers available, both CMOS and TTL. The 555 timer illustrated is both CMOS and TTL compatible although many of the functions could be better performed either with a specialised timer or using logic gates.

The timer can be used in three modes timing, as an astable multivibrator, or a monostable multivibrator.

The 555 as a Timer

The input circuit of the timer shown in figure 9 produces

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